2021 Workshop on
 Negative results,
  Opportunities,
   Perspectives, and
    Experiences

Recent advances in quantum computing hardware have created substantial excitement towards the potential of these technologies. Yet there exists tremendous opportunity and shortfall in efforts that take a systems view of quantum computing. In this talk, I will describe how the systems perspective has evolved over the last 20 years, describing some of the opportunities, successes, and failures that have occurred along the way.

The upsurge of connected devices, applications and services has raised important cybersecurity challenges due to the exponential increase of attacks and their sophistication. These attacks cast a shadow on the adoption of smart mobile applications and services, which has been amplified by the large number of different platforms that provide data, storage, computation, and application services to end-users. All this makes system security complex and challenging. Deep-Learning is now at the core of our cybersecurity mechanisms. In this talk, we will revise the main DL techniques used and identify where they are useful and where they are not. Then, we will identify the obstacles we face when pushing for better cybersecurity detection/protection mechanisms for infrastructure (i.e. network level), software (i.e. malware) and privacy (i.e. privacy preservation).

Cloud systems have become increasingly prevalent, which has motivated a wealth of research directions targeting both their hardware and software design. Not having access to production applications places academic research at a disadvantage in terms of showing the representativeness of its results. In this talk I will discuss the challenges and opportunities datacenter research in academia presents, and some ways to address the lack of production applications and systems when it comes to some of the newer cloud paradigms, like microservices, serverless compute, and hardware acceleration

Hardware prefetching is a well known latency hiding technique for improving performance. A hardware prefetcher predicts future memory references and brings data to cache before processor demands it. However, in case of many-core systems, prefetchers can increase shared resource contention such as DRAM bandwidth contention, degrading overall system performance. Research on controlling aggressiveness (that controls prefetch degree and distance) of prefetchers has focused on heterogeneous workloads having a mix of prefetch friendly (applications that get benefit with prefetching) and unfriendly (applications that do not get benefit with prefetching). But a large number of server workloads are multi-threaded and homogeneous in nature. We showcase, prefetch aggressiveness controllers that perform well in case of heterogeneous workloads by classifying and grouping applications, provide marginal utility in case of homogeneous workloads. Our findings show, there is no need of grouping or clustering mechanisms for controlling aggressiveness. Instead, we make a case for a simple online profiler that can decide whether to keep prefetchers ON or OFF. Paper link

In the style of David Patterson's "How to give a bad talk" and "How to have a bad career", this talk will discuss how to develop bad tools. Software artifacts such as prototype systems, simulators, RTL designs, and data analysis tools are paramount to computer systems research. In some cases, the tools developed for a project can have more impact than research papers. This impact comes not from the inherent beauty of cleverness of the artifact, but from other people using and building off of the artifact. In this talk, I will draw on my own experience developing bad tools (and good tools!) as well as look at some of the unsuccessful (and successful!) examples from the community.

The hardware lottery describes when a research idea wins because it is suited to the available software and hardware and not because the idea is superior to alternative research directions. Examples from early computer science history illustrate how hardware lotteries can delay research progress by casting successful ideas as failures. These lessons are particularly salient given the advent of domain specialized hardware which make it increasingly costly to stray off of the beaten path of research ideas

In this talk, I will give an overview of my PhD experience of finding bugs in real computer systems. The key take-away from this talk is that many impactful research ideas lay at the intersection between disciplines. In particular, my early dissertation research focused on applying formal analysis techniques that had proven useful in reasoning about parallel program correctness to reason about the correctness of hardware-level concurrency. This work identified a series of deficiencies in the 2016 RISC-V ISA’s memory consistency model (MCM) specification and discovered bugs in some commercial compilers. Later, in an effort to further motivate the importance of hardware correctness, my work made the observation that the same sorts of techniques we were using for efficiently verifying the correctness of processor concurrency could be used to evaluate processor security. From this observation, we design a hardware security verification tool that identified two new variants of the now-famous Meltdown and Spectre attacks that impacted Intel processors.